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 Preliminary W81181D/AD USB HUB CONTROLLER
W81181D/AD USB HUB Controller
-1-
Publication Release Date: October 1999 Revision A1
Preliminary W81181D/AD
W81181D Data Sheet Revision History
Pages 1 2 3 4 5 6 7 8 9 10 N.A. Dates 10/01/98 3/15/99 3/30/99 5/4/99 5/13/99 5/26/1999 7/09/1999 7/12/1999 Version 0.50 0.60 0.61 0.62 0.63 0.64 0.65 0.66 Version on Web N.A. First published. Add pin configuration and pin description Modify pin configuration & pin description Modify reference schematic Modify pin 12 description Modify feature HUB spec Rev 1.1 Add 48 MHz clock input pinout Modify 48 MHz (W81181AD) Schematic Main Contents
Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owners.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales.
-2-
Preliminary W81181D/AD
Table of Contents1. GENERAL DESCRIPTION....................................................................................................................... 4 2. FEATURES................................................................................................................................................ 4 3. USB BLOCK DIAGRAM .......................................................................................................................... 5 4. PIN CONFIGURATION............................................................................................................................. 6 W81181D (12 MHZ CLOCK INPUT) ............................................................................................................. 6 W81181AD (48 MHZ CLOCK INPUT)........................................................................................................... 7 5. PIN DESCRIPTION................................................................................................................................... 8 W81181D:................................................................................................................................................... 8 W81181AD: .............................................................................................................................................. 10 IO TYPE: ..................................................................................................................................................12 6. ABSOLUTE MAXIMUM RATINGS........................................................................................................12 7. ELECTRICAL CHARACTERISTICS.....................................................................................................13 8. TYPICAL APPLICATION ....................................................................................................................... 15 W81181D:................................................................................................................................................. 15 W81181AD: .............................................................................................................................................. 16 10. PACKAGE DIMENSIONS .................................................................................................................... 18
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Publication Release Date: October 1999 Revision A1
Preliminary W81181D/AD
1. GENERAL DESCRIPTION
W81181D, an high integrated 4 port USB hub controller which integrates a microcontroller, implements a medium speed (12 MHz) and slow speed (1.5 MHz) Universal Serial Bus (USB) hub control interface. It supports one upstream, four downstream ports and a serial interface. W81181D can be act as multifunction USB device. For example, the whole system can be designed as an USB HUB plus an USB mouse or an USB HUB plus an IR receiver, and no down stream port be occupied as well as no other component needed. W81181D acts as an USB hub controller and a hub repeater at the direction of an internal microcontroller. W81181D controls the traffic among the host, four downstream ports, and the microprocessor. As a hub controller, it can enable/disable ports, send and receive resets, and detect devices of high or low speeds. The W81181D contains three function endpoints and two hub endpoints to allow both USB Control and Interrupt Transfers between the host and microcontroller. W81181D is a compound USB device (hub with embedded function attached) with totally five downstream ports. W81181D can be used as a hub controller in a standalone hub with attached function or a microcontroller based USB device with hub function.
Ordering Information
PART NO. W81181D W81181AD INPUT CLOCK Freq. 12 MHz 48 MHz PACKAGE 48-LQFP 48-LQFP
2. FEATURES
* Full compliance with USB spec Rev 1.1 and HID Class Definition Rev 1.0 * Compliance with USB Hub spec Rev 1.1 * Support multiple endpoints for standalone hub with attached function * Embedded microprocessor--8052 ( 6K ROM + 256 Byte RAM) * Support auto-detected two power source mode between bus power mode and self power mode. * 12-MHz crystal/oscillator input to lower EMI (W81181D) * 48-Mhz oscillator input for motherboard application (W81181AD) * Support Suspend and Resume operation * Four downstream ports with per port overcurrent protection * Two endpoints for hub (Control and Interrupt) * LED display supports bright/blinking alternative for port enable and OCP(over current protection) flags * Single 5V supplied with embedded 5V-3.3V regulator * Three endpoints for attached device (one Control and two Interrupt) * Provides the external pull-up resistor control for the up-stream connection. * Perport/Global downstream port power control optional * Packaged in 48-pin LQFP * 5V CMOS device
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Preliminary W81181D/AD
3. USB BLOCK DIAGRAM
The Serial Interface Engine (SIE) controls the USB data flow between the uCs and the USB bus. Port0 is a high speed (HS) transceiver for the upstream data path. The Hub Repeater is the traffic controller which directs the bus data to and from the correct paths. The hub Controller and Function Controller determines what data is to be written to or read from the various FIFOs. The Bus Controller directs the interface between the uC and Hub/Function Controller.
UPSTREAM PORT
TRANCEIVER PORT 0
SERIAL INTERFACE ENGINE
HUB REPEATER
HUB CONTROLLER
FUNCTION CONTROLLER
TRANCEIVER PORT 1
TRANCEIVER PORT 2
TRANCEIVER PORT 3
TRANCEIVER PORT 4
USB FIFOs
BUS CONTROLLER
DOWNSTREAM DEVICES
uC
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Publication Release Date: October 1999 Revision A1
Preliminary W81181D/AD
4. PIN CONFIGURATION
W81181D (12 MHz Clock Input)
P1[2]/FSUSP5/BUSPWR
FWKP5 PWEN1_ OCP1_
LEDEN0_ PWEN3_
GND PWEN2_ OCP2_
GND3V
36 DP4 DM4 DP3 DM3 GND3V DP2 DM2 DP1 DM1 GND3V DP0 DM0 48 1 37
OCP3_
PWEN4_ 25 24
OCP4_ EXTPUEN VDD XTAL2 XTAL1
W81181D
GND LEDEN1_ LEDEN2_ LEDEN3_ LEDEN4_ LEDEN5_ 13 12 P1[1]/SSTB
VDD3V VDDA
RESET
VBUS
VDD
P3[3]/INT1_
LEDOC4_
LEDOC3_
LEDOC2_
GNDA
LEDOC1_
-6-
P1[0]/SACK/INDIV
Preliminary W81181D/AD
W81181AD (48 MHz Clock Input)
P1[2]/FSUSP5/BUSPWR
LEDEN0_
PWEN1_ OCP1_
GND PWEN2_ OCP2_
PWEN3_
GND3V
FWKP5
36 DP4 DM4 DP3 DM3 GND3V DP2 DM2 DP1 DM1 GND3V DP0 DM0 48 1 37
OCP3_
PWEN4_ 25 24
OCP4_ EXTPUEN VDD 48CLKIN GND
W81181AD
LEDEN1_ 48CLKEN_ LEDEN2_ LEDEN3_ LEDEN4_ LEDEN5_ 13 12 P1[1]/SSTB
RESET
VDD3V VDDA
VBUS
VDD
P3[3]/INT1_
LEDOC4_
LEDOC3_
LEDOC2_
GNDA
LEDOC1_
-7-
P1[0]/SACK/INDIV
Publication Release Date: October 1999 Revision A1
Preliminary W81181D/AD
5. PIN DESCRIPTION
W81181D
PIN NUMBER 1 2 3 4 5 6 7 8 9 10 11 PAD NAME VDD3V VDDA GNDA VBUS LEDOC4_ LEDOC3_ LEDOC2_ LEDOC1_ VDD RESET P3[3]/ INT1_ 12 P1[0]/ SACK/ INDIV 13 P1[1]/ SSTB 14 15 16 17 18 19 20 LEDEN5_ LEDEN4_ LEDEN3_ LEDEN2_ LEDEN1_ GND XTAL1 IOU2P IOU2P IOU2P IOU2P IOU2P Power0 OSCM IOUD2 IOUD2 I/O TYPE Power1 Power1 Power0 IUD2T IOU2P IOU2P IOU2P IOU2P Power1 IUD2T IOUD2 PIN FUNCTION 3.3V Regulator output. Supply voltage for all transceivers. Analog power. Analog ground. Input of upstream power status. On self-power mode, connection should be controlled by VBUS status. Flag of port4 over-current. To drive LED directly Flag of port3 over-current. To drive LED directly Flag of port2 over-current. To drive LED directly Flag of port1 over-current. To drive LED directly Digital supply voltage. Master reset input. Active high. Normally, this pin is P33/INT1_ and used as bidirectional serial data (SDATA) for embedded function serial port. Normally, this pin is P10 and used as bi-directional serial data ACK (SACK) for embedded function serial port. If no embedded function this pin is INDIVIDUAL (default) or GANGED mode setting for downstream power control. Normally, this pin is P11 and used as bi-directional serial data Strobe (SSTB) for embedded function serial port. Downstream port5 LED. Active low to drive bright/blinking LED when port5 enable. Downstream port4 LED. Active low to drive bright/blinking LED when port4 enable. Downstream port3 LED. Active low to drive bright/blinking LED when port3 enable. Downstream port2 LED. Active low to drive bright/blinking LED when port2 enable. Downstream port1 LED. Active low to drive bright/blinking LED when port1 enable. Digital ground Crystal IN. For 12 MHz oscillation. PULL UP/ DOWN O O O O U
U
U
O O O O O -
-8-
Preliminary W81181D/AD
Pin Description ( W81181D ), continued
PIN NUMBER 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
PAD NAME XTAL2 VDD EXTPUEN OCP4_ PWEN4_ OCP3_ PWEN3_ LEDEN0_ OCP2_ PWEN2_ GND OCP1_ PWEN1_ FWKP5 P1[2]/ FSUSP5/ PWRDET
I/O TYPE OSCM Power1 O2 IUD2T O2 IUD2T O2 IOU2P IUD2T O2 Power0 IUD2T O2 IUD2 IOUD2
PIN FUNCTION Crystal OUT. For 12 MHz oscillation. Digital supply voltage. External pull-up connection control. Downstream port4 over-current status. Active low. Downstream port4 power control. Active low. Downstream port3 over-current status. Active low. Downstream port3 power control. Active low. Upstream port0 LED. Active low to drive bright/blinking LED when upstream port0 enable. Downstream port2 over-current status. Active low. Downstream port2 power control. Active low. Digital ground. Downstream port1 over-current LED. Active low. Downstream port1 power control. Active low. Embedded function wake-up input. Normally, this pin is a P12 and used as embedded function suspend control. If no embedded function this pin is self-powered (High) or bus-powered (Low) hub setting. Ground of port3 and port4 transceivers. USB D+ for downstream port4. USB D- for downstream port4. USB D+ for downstream port3. USB D- for downstream port3. Ground of port1 and port2 transceivers. USB D+ for downstream port2. USB D- for downstream port2. USB D+ for downstream port1. USB D- for downstream port1. Ground of port0 transceivers. USB D+ for upstream port0. USB D- for upstream port0.
PULL UP/ DOWN
O O O O O O D
36 37 38 39 40 41 42 43 44 45 46 47 48
GND3V DP4 DM4 DP3 DM3 GND3V DP2 DM2 DP1 DM1 GND3V DP0 DM0
Power0 AIO AIO AIO AIO Power0 AIO AIO AIO AIO Power0 AIO AIO
-
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Publication Release Date: October 1999 Revision A1
Preliminary W81181D/AD
W81181AD
PIN NUMBER 1 2 3 4 PAD NAME VDD3V VDDA GNDA VBUS I/O TYPE Power1 Power1 Power0 IUD2T PIN FUNCTION 3.3V Regulator output. Supply voltage for all transceivers. Analog power. Analog ground. Input of upstream power status. On self-power mode, connection should be controlled by VBUS status. Flag of port4 over-current. To drive LED directly Flag of port3 over-current. To drive LED directly Flag of port2 over-current. To drive LED directly Flag of port1 over-current. To drive LED directly Digital supply voltage. Master reset input. Active high. Normally, this pin is P33/INT1_ and used as bidirectional serial data (SDATA) for embedded function serial port. Normally, this pin is P10 and used as bi-directional serial data ACK (SACK) for embedded function serial port. If no embedded function this pin is INDIVIDUAL (default) or GANGED mode setting for downstream power control. Normally, this pin is P11 and used as bi-directional serial data Strobe (SSTB) for embedded function serial port. Downstream port5 LED. Active low to drive bright/blinking LED when port5 enable. Downstream port4 LED. Active low to drive bright/blinking LED when port4 enable. Downstream port3 LED. Active low to drive bright/blinking LED when port3 enable. Downstream port2 LED. Active low to drive bright/blinking LED when port2 enable. High enable embedded DPLL (12 MHz to 48 MHz). It should be kept to Low when using 48Mhz clock. Downstream port1 LED. Active low to drive bright/blinking LED when port1 enable. Digital ground PULL UP/ DOWN -
5 6 7 8 9 10 11
LEDOC4_ LEDOC3_ LEDOC2_ LEDOC1_ VDD RESET P3[3]/ INT1_
IOU2P IOU2P IOU2P IOU2P Power1 IUD2T IOUD2
O O O O U
12
P1[0]/ SACK/ INDIV
IOUD2
U
13
P1[1]/ SSTB
IOUD2
U
14 15 16 17 18 19 20
LEDEN5_ LEDEN4_ LEDEN3_ LEDEN2_ 48CLKEN_ LEDEN1_ GND
IOU2P IOU2P IOU2P IOU2P IUD2 IOU2P Power0
O O O O U O -
- 10 -
Preliminary W81181D/AD
Pin Description ( W81181AD ), continued
PIN NUMBER 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
PAD NAME 48CLKIN VDD EXTPUEN OCP4_ PWEN4_ OCP3_ PWEN3_ LEDEN0_ OCP2_ PWEN2_ GND OCP1_ PWEN1_ FWKP5 P1[2]/ FSUSP5/ PWRDET
I/O TYPE OSCM Power1 O2 IUD2T O2 IUD2T O2 IOU2P IUD2T O2 Power0 IUD2T O2 IUD2 IOUD2
PIN FUNCTION Clock input for 48 MHz oscillation. Digital supply voltage. External pull-up connection control. Downstream port4 over-current status. Active low. Downstream port4 power control. Active low. Downstream port3 over-current status. Active low. Downstream port3 power control. Active low. Upstream port0 LED. Active low to drive bright/blinking LED when upstream port0 enable. Downstream port2 over-current status. Active low. Downstream port2 power control. Active low. Digital ground. Downstream port1 over-current LED. Active low. Downstream port1 power control. Active low. Embedded function wake-up input. Normally, this pin is a P12 and used as embedded function suspend control. If no embedded function this pin is self-powered (High) or bus-powered (Low) hub setting. Ground of port3 and port4 transceivers. USB D+ for downstream port4. USB D- for downstream port4. USB D+ for downstream port3. USB D- for downstream port3. Ground of port1 and port2 transceivers. USB D+ for downstream port2. USB D- for downstream port2. USB D+ for downstream port1. USB D- for downstream port1. Ground of port0 transceivers. USB D+ for upstream port0. USB D- for upstream port0.
PULL UP/ DOWN -
O O O O O
O D
36 37 38 39 40 41 42 43 44 45 46 47 48
GND3V DP4 DM4 DP3 DM3 GND3V DP2 DM2 DP1 DM1 GND3V DP0 DM0
Power0 AIO AIO AIO AIO Power0 AIO AIO AIO AIO Power0 AIO AIO
-
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Publication Release Date: October 1999 Revision A1
Preliminary W81181D/AD
IO TYPE
IO TYPE Power1 Power0 OSCM IUD2 IUD2T IOU2P IOUD2 O2 AIO DESCRIPTION Power Ground Middle-freq. Oscillating IO Input with pull-up/pull-down control Schmitt Input with pull-up/pull-down control Bi-directional high driving IO with programmable pull-up control and serial resistor Bi-directional IO with pull-up/pull-down control Output Analog Transceiver IO
Pull Up/Down Control NOTE O D U DESCRIPTION Output pin without pull-up/down Input pin or I/O pin with pull-down Input pin or I/O pin with pull-up Input pin or I/O pin without pull-up/down
6. ABSOLUTE MAXIMUM RATINGS
PARAMETER Supply Voltage (Vcc to Vss) Analog Input Voltage Digital Input Voltage Power Dissipation Ambient Operating Temperature Lead Temperature (Soldering, 10 sec) 5.5V Vss -0.5V to Vcc +0.5V Vss -0.5V to Vcc +0.5V TBD 0 C to 70 C 250o C
o o
LIMIT
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device.
- 12 -
Preliminary W81181D/AD
7. ELECTRICAL CHARACTERISTICS
Operating Conditions
VCC = 5V +/-5%, TA = 0o to 70o C
PARAMETER VCC Supply Current Logic Output High Logic Output Low Logic Input Leakage Current USB CHARACTERISTICS Leakage Current: Hi-Z State Output Leakage Input Levels: Differential Input Sensitivity Single Ended Signal "0" Differential Common Mode Range Output Levels: Driver Output Low Driver Output High Output Signal Crossover Voltage Capacitance: Transceiver Capacitance Full Speed Timings: Output Rise/Fall Times Source Differential Driver Jitter to Next Transition /to Paired Transition Differential to EOP transition Skew Hub Differential Data Delay(without cable) Hub Differential Driver Jitter to Next Transition /to Paired Transition (including cable) Data bit width distortion after SOP Hub SE0 Delay Relative to tHDD Hub EOP Output Width Skew Low Speed Timings: Output Rise/Fall Times
SYM. ICC VOH VOL
CONDITIONS Io > 24 mA Io > 6 mA TA = 70 oC Note 8 V< VIN < 3.3V |(D+)-(D-)| Includes VDI range RL of 1.5 K to 3.6V RL of 15 K to GND
MIN. 2.5
MAX. TBD VCC 0.4 10
UNIT mA V V uA
ILO VDI VSE0 VCM VOLU VOHU VCRS CIN tR/tF tDJ1 /tDJ2 tDEOP tHDD2 tHDJ1 /tHDJ2 tSOP tEOPD tHESK tR/tF
-10 0.2 0.8 0.8
+10
uA V V
2.0 2.5 0.3
V V V pF nS nS nS nS ns nS
2.8 1.3
3.6 2.0 20
Pin to GND
Notes 1, 4 (CL = 50 pF) Notes 2, 3
4 -3.5 /-4 -2
20 3.5 /4 5 44 3 /1 5 15 15 300
Note 3 Notes 2, 3, 5 Notes 2, 3, 5
-3 /-1 -5 0 -15 75
Notes 3, 5 Notes 3, 5 Notes 3, 5 Notes 1, 4 (CL = 50 pF)
nS nS nS nS
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Publication Release Date: October 1999 Revision A1
Preliminary W81181D/AD
Electrical Characteristics, continued
PARAMETER
SYM.
CONDITIONS
Notes 2, 3
MIN.
MAX.
UNIT
Source Differential Driver Jitter to Next Transition /to Paired Transition Differential to EOP transition Skew Hub Differential Data Delay(without cable) Hub Differential Driver Jitter to Next Transition /to Paired Transition (including cable) Data bit width distortion after SOP Hub SE0 Delay Relative to tHDD Hub EOP Output Width Skew
Notes: 1. Measured from 10% to 90% of the data signal. 2. Timing difference between the differential signals. 3. Measured at crossover point of differential data signals. 4. The rising and falling edges should be smoothly transiting(monotonic)
tDJ1 /tDJ2 tDEOP tHDD2 tHDJ1 /tHDJ2 tSOP tEOPD tHESK
-25 /-14 -40 -45 /-45 -60 0 -300
25 /14 100 300 45 /-45 60 200 300
nS nS nS nS nS nS nS nS
Notes 3 Notes 2, 3, 5 Notes 2, 3, 5
Notes 3, 5 Notes 3, 5 Notes 3, 5
5. Full Speed timing have a 1.5 k pull-up to 2.8 V on the D+ (DP) data line. 6. Low Speed timing have a 1.5 k pull-up to 2.8 V on the D- (DM) data line. 7. The maximum load specification is the maximum effective capacitive load allowed that meets the target hub VBUS droop of 330 mV. 8. All other USB Electrical Characteristics refer to USB spec Rev 1.1 7.3.2 and 7.3.3.
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Preliminary W81181D/AD
8. TYPICAL APPLICATION
W81181D
W81181D USB Hub Reference Schematic (Pure Hub)
C9 U4 9 22 2 1 C10 C11 C12 VBUS
VCC + C36
15p 15p 15p 15p
DM1 DP1 DM2 DP2 DM3 DP3 DM4 DP4 PWEN1 PWEN2 PWEN3 PWEN4
45 44 43 42 40 39 38 37 33 30 27 25 32 R13 R14 R15 R16 R17 R18 R19 R20
0.1u
VDD3
VDD3V XTAL1 XTAL2 RESET LEDEN0 LEDEN1 LEDEN2 LEDEN3 LEDEN4 LEDEN5 LEDOC1 LEDOC2 LEDOC3 LEDOC4 INT1/P33 SACK/INDIV SSTB/P11 FWKP5 PWRDET/FSUS5 VBUS EXTPUEN
+ C35
+
C8
X1 X2 RESET LEDHUB LEDEN1 LEDEN2 LEDEN3 LEDEN4 LEDOC1 LEDOC2 LEDOC3 LEDOC4 SCL SDA
C33
20 21 10 28 18 17 16 15 14 8 7 6 5 11 12 13 34 35 4 23
0.1u
10u
PWEN1 PWEN2 PWEN3 PWEN4 OCP1 OCP2 OCP3 OCP4
C13
C14
C15
C16
30 30
0.1u
DD+
+
VDD VDD VDDA
30 D130 D1+ 30 30 30 30
D2D2+ D3D3+ D4D4+
R33
7.5K
+
C34
10u
15p 15p 15p 15p
1 2 3 4 6 5
USB1
VBUS
OCP1 29 OCP2 26 OCP3 24 OCP4 DM0 47 DP0 GND GND GNDA
19 31 3 36 48
USB(B)
R21 R22 C17 C18 C29 +
30 30
R32
DD+
4.7K
R31
PWRDET EXTPUEN
15p 15p
D1D1+
R1 R2
27K
GND3V 41 GND3V 46 GND3V
USB2
0.1u
USB(A)
1 2 3 4 6 5
W81181D-48LQFP
15K 15K
C1
VCC R34 R35 R36 R37 R38 R39 R40 R41 R42
VCC2 U2
220
220
220
220
220
220
220
220
220
PWEN1 FL1 FL2 PWEN2
1 2 3 4
120u
O/A 7 IN 6 GND 5 O/B
8
+
D5
D1
D2
D3
D4
D6
D7
D8
D9
LED
LEDHUB LEDEN1 LEDEN2 LEDEN3 LEDEN4
LED
LED
LED
LED
LED
LED
LED
LED
LEDOC1 LEDOC2 LEDOC3 LEDOC4
AIC1526-0
R3 R4
120u 0.1u 15K 15K
D2D2+
+
C/A F/A F/B C/B
PW1 PW2
C3
+
0.1u
C2 C30 USB3
USB(A)
1 2 3 4 6 5
VCC R30 R29 VCC R28 R23 + C7
10K 10K 10K 10K
R5
C31 +
D3D3+
USB4
0.1u
USB(A)
1 2 3 4 6 5
10u
RESET
OCP1 OCP2
R24
FL1 FL2
R6
15K 15K
C4 VCC2
10K
R25
R43
3.3K
OCP3 OCP4
+ C37 + C38
10K
R26
FL3
U3
120u
O/A 7 IN 6 GND 5 O/B
8
10K
+ C39
R27
FL4
10K
+ C40
PWEN3 FL3 FL4 PWEN4
1 2 3 4
0.1u
0.1u
0.1u
0.1u
AIC1526-0
R7 R8
120u 0.1u 15K 15K
D4D4+
+
C/A F/A F/B C/B
PW3 PW4
C6
+
0.1u
C5 + C32 USB5
USB(A)
1 2 3 4 6 5
X1
C41
Vendor ID / Product ID build in EEPROM
30p
Y1
VCC U1 1 2 3 4
VCC
12MHz
X2
C42
A0 A1 A2 VSS
VCC RC SCL SDA
8 7 6 5
SCL SDA
30p
24LC04B
inbond
Size Document Number Date: Friday, July 09, 1999
WINBOND ELECTRONICS CORP.
W81181D Reference Schematic Sheet 1 of 1
Rev 2.1
- 15 -
Publication Release Date: October 1999 Revision A1
Preliminary W81181D/AD
W81181AD
W81181AD USB Hub Reference Schematic (48MHz for Mother Board)
C9 U4 9 22 2 1 C10 C11 C12
VCC + C36
15p 15p 15p 15p
DM1 DP1 DM2 DP2 DM3 DP3 DM4 DP4
45 44 43 42 40 39 38 37 33 R13 R14 R15 R16 R17 R18 R19 R20
0.1u
VDD3
VDD VDD VDDA VDD3V 48CLKIN 48CLKEN RESET LEDEN0 LEDEN1 LEDEN2 LEDEN3 LEDEN4 LEDEN5 LEDOC1 LEDOC2 LEDOC3 LEDOC4 INT1/P33 SACK/INDIV SSTB/P11 FWKP5 PWRDET/FSUS5 VBUS EXTPUEN
30 D130 D1+ 30 30 30 30 30 30
D2D2+ D3D3+ D4D4+
VCC
X1
+ C35 + C8
21 18 10 28 19 17 16 15 14 8 7 6 5 11 12 13 34 35 4 23
0.1u
10u
RESET LEDHUB LEDEN1 LEDEN2 LEDEN3 LEDEN4 LEDOC1 LEDOC2 LEDOC3 LEDOC4 SCL SDA
PWEN1 30 PWEN2 27 PWEN3 25 PWEN4 OCP1 29 OCP2 26 OCP3 24 OCP4 DM0 47 DP0 GND GND GNDA
20 31 3 36 48 32
PWEN1 PWEN2 PWEN3 PWEN4 OCP1 OCP2 OCP3 OCP4
C13
C14
C15
C16
15p 15p 15p 15p
R33
VCC
7.5K
R21 R22 C17 C18 C29 +
30 30
ROOTHUB_DROOTHUB_D+
R32
4.7K
15p 15p
D1D1+
R1 R2
EXTPUEN
GND3V 41 GND3V 46 GND3V
USB2
0.1u
USB(A)
1 2 3 4 6 5
W81181AD-48LQFP
15K 15K
C1
VCC R34 R35 R36 R37 R38 R39 R40 R41 R42
VCC U2
220
220
220
220
220
220
220
220
220
PWEN1 FL1 FL2 PWEN2
1 2 3 4
120u
O/A 7 IN 6 GND 5 O/B
8
+
D5
D1
D2
D3
D4
D6
D7
D8
D9
LED
LEDHUB LEDEN1 LEDEN2 LEDEN3 LEDEN4
LED
LED
LED
LED
LED
LED
LED
LED
LEDOC1 LEDOC2 LEDOC3 LEDOC4
AIC1526-0
R3 R4
120u 0.1u 15K 15K
D2D2+
+
C/A F/A F/B C/B
PW1 PW2
C3
+
0.1u
C2 C30 USB3
USB(A)
1 2 3 4 6 5
VCC R30 R29 VCC R28 R23 + C7
10K 10K 10K 10K
R5
C31 +
D3D3+
USB4
0.1u
USB(A)
1 2 3 4 6 5
10u
RESET
OCP1 OCP2
R24
FL1 FL2
R6
15K 15K
C4 VCC
10K
R25
R43
3.3K
OCP3 OCP4
+ C37 + C38
10K
R26
FL3
U3
120u
O/A 7 IN 6 GND 5 O/B
8
10K
+ C39
R27
FL4
10K
+ C40
PWEN3 FL3 FL4 PWEN4
1 2 3 4
0.1u
0.1u
0.1u
0.1u
AIC1526-0
R7 R8
120u 0.1u 15K 15K
D4D4+
+
C/A F/A F/B C/B
PW3 PW4
C6
+
0.1u
C5 + C32 USB5
USB(A)
1 2 3 4 6 5
Vendor ID / Product ID build in EEPROM
VCC U1
VCC 1 2 3 4
48MHz In
X1
A0 A1 A2 VSS
VCC RC SCL SDA
8 7 6 5
SCL SDA
24LC04B
inbond
Size Document Number Date: Monday, July 12, 1999
WINBOND ELECTRONICS CORP.
W81181AD Reference Schematic Sheet 1 of 1
Rev 2.2
- 16 -
Preliminary W81181D/AD
9. HOW TO READ THE TOP MARKING
The top marking of W81181D
W81181D
745AA-02A
Left: Winbond logo 1st line: Type number W8181, D means LQFP (Thickness = 1.4 mm) 2nd line: Tracking code 745 A A - 02A 745: packages made in '97, week 45 A: assembly house ID; A means ASE, O means OSE A: IC revision; A means version A, B means version B 02A: for internal use
- 17 -
Publication Release Date: October 1999 Revision A1
Preliminary W81181D/AD
10. PACKAGE DIMENSIONS
48-pin QFP
HD D
36 25
Dimension in Inch
Dimension in mm Min.
--0.05 1.35 0.17 0.09
Symbol
Min.
Nom.
Max.
Nom.
----1.40 0.20 --7.00 7.00 0.50 9.00 9.00
Max.
1.60 0.15 1.45 0.27 0.20
37
24
E
HE
48
13
1
e
b
12
c A2 A
A A1 A2 b c D E e HD HE L L1 y
0.45
0.60 1.00
0.75
--0
0.08 3.5
--7
Notes:
1. Dimensions D & E do not include interlead flash. 2. Dimension b does not include dambar protrusion/intrusion. 3. Controlling dimension: Millimeters 4. General appearance spec. should be based on final visual inspection spec.
Seating Plane
See Detail F
A1 y
L L
1
Detail F
Headquarters
Winbond Electronics (H.K.) Ltd.
Rm. 803, World Trade Square, Tower II, No. 4, Creation Rd. III, 123 Hoi Bun Rd., Kwun Tong, Science-Based Industrial Park, Kowloon, Hong Kong Hsinchu, Taiwan TEL: 852-27513100 TEL: 886-3-5770066 FAX: 852-27552064 FAX: 886-3-5792646 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-27197006
Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab.
2727 N. First Street, San Jose, CA 95134, U.S.A. TEL: 408-9436666 FAX: 408-5441798
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-27190505 FAX: 886-2-27197502
Note: All data and specifications are subject to change without notice.
Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owners.
- 18 -


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